Processor Description in APDL for Design Space Exploration of Embedded Processors

This paper presents modeling of embedded processors in Anahita Processor Description Language (APDL). APDL is a language for generation of retargetable processor design tool sets. The emphasis is on the applicability of the generated tools in the design space exploration (DSE) phase of designing new embedded processors. APDL introduces a new level of abstraction for processor description. This language can be used for generation of tools such as compilers, architecture verification tools, instruction set simulators, and hardware generators. In particular, it provides constructs to explicitly model the interaction of instructions in the processor’s code sequence. The paper first investigates the features required for a language to be useful for DSE and then presents APDL constructs along with code samples and a case study.